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If
1'b0 is set on En, an interrupt request is disabled. However, status register AlmFlg.Flg0 transitions to 1'b1 if conditions are met.
bit[8] : Busy (Write Busy Status)
This register indicates how far AlmOutEn0 register is reflected.
When Busy indicates "1", the register is reflecting Enable Signal (means that AlmOutEn0 must not be
updated). Once the reflection is completed, Busy becomes "0" automatically.
Busy
0
1
bit[15] : Dbg (Enable Signal Value for current Normal Alarm0 Interrupt)
This register is used for debugging. By reading this register, you can see Enable Signal value for the Normal
Alarm0 Interrupt that is currently used in RTC. By using this register, you can check whether the set value
has been normally reflected on AlmOutEn0.En or not.
bit[16] : ErrEn (Enable Signal for Error Alarm0 Interrupt)
This register does the settings for notifying processor of Error Alarm Flag0.
ErrEn
0
1
If 1'b0 is set on ErrEn,
an interrupt request is disabled. However, status register AlmFlg.ErrFlg0 transitions to 1'b1 if conditions
are met.
bit[31] : ErrDbg (Enable Signal Value for current Error Alarm0 Interrupt)
This register is used for debugging. By reading this register, you can see Enable Signal value for the Error
Alarm0 Interrupt that is currently used in RTC. By using this register, you can check whether the set value
has been normally reflected on AlmOutEn0.ErrEn or not.
If conditions are met, interrupt will be asserted.
Description of Functions
Reading 0: AlmOutEn0 is not set or reflected completely.
Reading 1: AlmOutEn0 is being reflected. AlmOutEn0 must not be written.
Description of Functions
Writing 0: disables an interrupt request to processor.
Even if conditions are met, interrupt will be deasserted.
Writing 1: enables an interrupt request to processor.
If conditions are met, interrupt will be asserted.
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