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such as using the MATHFUNC_SEL register (Section 3.9.12.3.27) to perform normalization processing as a
preprocess.
3.9.15.7
Caution upon Directly Controlling the I2C Block from the CPU
The I2C block equipped on the SCU requires an idle time from when Enable is set to the time when the internal
state becomes Active. This is done by setting by IC_ENABLE[0] to "1". During this idle period, master operation
will not begin even when data is written to the IC_DATA_CMD. To avoid this, check TX_EMPTY by reading
out the register or stop the functional block (set IC_ENABLE[0] to "0") after checking whether the
MST_ACTIVITY changes from "0" to "1". See the following flowchart for the procedures.
Write 0 to
IC_ENABLE to
disable
DW_apb_i2c
Program IC_CON register fields as
required:
1. Set IC_SLAVE_DISABLE to 1 Slave disabled
2. Set IC_RESTART_EN to 1 Enable restart mode
3. Set IC_10BITADDR_MASTER to 0 7-bit addressing
4. Set IC_10BITADDR_SLAVE to 0 7-bit addressing
5. Set IC_MAX_SPEED_MODE to 1 Standard mode
6. Set IC_MASTER_MODE to 1 Master
Set address of target
Slave by writing it to TAR
Write to IC_SS_HCNT to
set HIGH period of SCL
Write to IC_SS_LCNT to
set LOW period of SCL
Write to IC_INTR_MASK
to enable all interrupts
Write to IC_RX_TL to set
Rx FIFO threshold level
Write to IC_TX_TL to set
Tx FIFO threshold level
Figure SCU (Sensor Control Unit)-89 I2C Master Control (Example)
3.9.15.8
Sequencer Startup Delay
When the sequencer is first started up by periodic startup, a delay as much as one cycle of the selected startup
period occurs until the first startup. In the same way, the time stamp also delays.
When the periodic startup by the timer is set to MODE1 and the following equation is "true", the START_CTRL
block issues an interrupt to the internal sequencer.
Write 1 to
IC_ENABLE to
enable
DW_apb_i2c
Write to IC_DATA_CMD to push
Write command and write data
or Read command Tx FIFO
Command is
No
Write?
Yes
TX_EMPTY
interrupt
asserted?
Yes
More
Yes
commands to
send?
No
Is IC_STATUS[5]
(MST_ACTIVITY) =
0?
Yes
Write 0 to
IC_ENABLE to
disable
DW_apb_i2c
－860/1010－
CXD5602 User Manual
It is necessary to check MST_ACTIVITY
before stopping the I2C macro.
But if confirmation of the TX_EMPTY interrupt
is omitted,there is a need to comfirm
a transition of 0→1→0 about MST_ACTIVITY.
RX_FULL
interrupt
asserted?
Yes
Read
IC_DATA_CMD[7:0] to
retrieve received byte
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