3.10.2.4
Clock Supply Start and Stop
3.10.2.4.1
Clock Supply Start
Perform the following control to start supplying the SSPCLK clock and PCLK clock to the SPI0.
1. Clock supply start to the AHB/APB Bus Bridge
SYSIOP_SUB_CKEN.COM_BRG = 1'b1
SYSIOP_SUB_CKEN.AHB_BRG_COMIF = 1'b1
2. Reset release
SWRESET_BUS.XRST_SPIM=1'b1
3. Clock supply start
SYSIOP_SUB_CKEN.SPIM=1'b1
3.10.2.4.2
Clock Supply Stop
Perform the following control to stop supplying the SSPCLK clock and PCLK clock to the SPI0.
1. Clock supply stop
SYSIOP_SUB_CKEN.SPIM=1'b0
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CXD5602 User Manual