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3.6.5.2.9
RdReq(0x30)
31
30
29
28
Reserved
-
15
14
13
12
Reserved
-
bit[0] : BusyA (Read Request)
When you write "1", this register issues a Read Request. Once the Read Request is issued, RTC Counter value
at the time when it is issued can be read from RdPostCnt and RdPreCnt.
BusyA
0
1
3.6.5.2.10
RdPostCnt(0x34)
31
30
29
28
Post
RO
15
14
13
12
Post
RO
bit[31:0] : Post[31:0] (PostCounter value at the time of Read Request )
By reading this register, you can see the PostCounter value at the point of time when the read request was
issued.
27
26
25
24
11
10
9
8
Description of Functions
Writing 0: You cannot write "0".
Writing 1: issues a Read Request. After reflecting values on RdPostCnt and
RdPreCnt, this register is cleared to "0" automatically when the same request
becomes possible to be issued again.
27
26
25
24
11
10
9
8
－184/1010－
23
22
21
20
7
6
5
4
23
22
21
20
7
6
5
4
CXD5602 User Manual
19
18
17
16
3
2
1
0
Busy
A
RW
19
18
17
16
3
2
1
0
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