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3.13.4.16
Start and Stop Sequence of ADSP
This section explains power supply, clock, and ADSP's recommended start and stop sequence including reset
control.
Precaution:
®
Cortex
-M4 processor with FPU has multiple clocks and resets. In this section, when without specific description
hereinafter, "clock" and "reset" means clock and reset of Cortex
Read-modify-write operation to registers is needed so that bits other than designated bits of the write register will
not be changed.
Perform ADSP's start control in the following order.
step1
Turn ON the power domain PWD_APP or supply clocks if
required.
step2
Turn ON the power domain PWD_APP if required.
step3
Start the ADSP.
Perform the ADSP's stop control in the following order.
step1
Stop the ADSP.
step2
Turn OFF the power domain PWD_APP_DSP if required.
step3
Stop the clock, turn OFF the power domain PWD_APP if
required.
3.13.4.16.1
Start of Clock Supply for APP
Control the clock supply using System and I/O Processor.
Precondition
The power supply of the power domain PWD_APP must be ON. (For power supply control, refer to the
PMU chapter 3.4.)
1. Clock supply setting for APP
Control clock division ratio and clock source using the API.
2. Start of clock supply
APP_CKEN.APP=1 (CK_APP supply starts)
APP_CKEN.AHB=1 (CK_APP_AHB supply starts)
APP_CKEN.MCLK=1 (CK_APP_MCLK supply starts (only when AUDIO is used))
For power supply control, refer to the PMU chapter.
Refer to 3.13.4.16.2 section.
Refer to 3.13.4.16.3 section.
Refer to 3.13.4.16.6 section.
Refer to 3.13.4.16.7 section.
For power supply control, refer to the PMU chapter
3.4.
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CXD5602 User Manual
®
-M4 processor with FPU core.
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