Toshiba GR200 Series Instruction Manual page 309
Centralized busbar protection ied
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Settings of binary output circuits
4.4.8
Setting table (IO_SLOT1) at MainUnit (IO#1) (Function ID 200B01)
(i)
Setting item
BO1
BO1_CPL
Input signal1
(Data-ID from other FBs)
Input signal2
Input signal3
Input signal4
Input signal5
Input signal6
Input signal7
Input signal8
LOGIC-SW
On Delay Timer
Off Delay Timer
INVERSE-SW
Normal / Inverse
TIMER-SW
Off / Delay / Dwell / Latch
Logic Timer
Reset signal
(Data-ID from other FBs)
BO2
BO2_CPL
Input signal1
(Data-ID from other FBs)
Input signal2
Input signal3
Input signal4
Input signal5
Input signal6
Input signal7
Input signal8
LOGIC-SW
On Delay Timer
Off Delay Timer
INVERSE-SW
Normal / Inverse
TIMER-SW
Off / Delay / Dwell / Latch
Logic Timer
Reset signal
(Data-ID from other FBs)
.....
......
BO9
BO18_CPL
Input signal1
(Data-ID from other FBs)
.......
Input signal8
LOGIC-SW
On Delay Timer
Off Delay Timer
INVERSE-SW
Normal / Inverse
TIMER-SW
Off / Delay / Dwell / Latch
Logic Timer
Reset signal
(Data-ID from other FBs)
Range
Off / On
-
Programmable binary output enable
-
First Data ID as input signal #1 for Logic gate
ditto
-
Second Data ID as input signal #2 for Logic gate
ditto
-
Third Data ID as input signal #3 for Logic gate
ditto
-
Forth Data ID as input signal #4 for Logic gate
ditto
-
Fifth Data ID as input signal #5 for Logic gate
ditto
-
Sixth Data ID as input signal #6 for Logic gate
ditto
-
Seventh Data ID as input signal #7 for Logic gate
ditto
-
Eighth Data ID as input signal #8 for Logic gate
AND / OR / XOR
-
Operation selection in Logic gate
0.000 - 300.000
s
On delay timer value
0.000 - 300.000
s
Off delay timer value
-
Binary signal inversion
-
Selection of Logic circuit
Off delay timer value for "Delay" and "Dwell"
0.000 - 300.000
s
circuit
-
Reset signal selection for "Latch" circuit
Off / On
-
Programmable binary output enable
-
Keying Data ID#1 as input signal for Logic gate
ditto
-
Keying Data ID#2 as input signal for Logic gate
ditto
-
Keying Data ID#3 as input signal for Logic gate
ditto
-
Keying Data ID#4 as input signal for Logic gate
ditto
-
Keying Data ID#5 as input signal for Logic gate
ditto
-
Keying Data ID#6 as input signal for Logic gate
ditto
-
Keying Data ID#7 as input signal for Logic gate
ditto
-
Keying Data ID#8 as input signal for Logic gate
AND / OR / XOR
-
Operation selection in Logic gate
0.000 - 300.000
s
On delay timer value
0.000 - 300.000
s
Off delay timer value
-
Binary signal inversion
-
Selection of Logic circuit
Off delay timer value for "Delay" and "Dwell"
0.000 - 300.000
s
circuit
-
Reset signal selection for "Latch" circuit
.......
.......
Off / On
-
Programmable binary output enable
-
Keying Data ID#1 as input signal for Logic gate
.......
.......
ditto
-
Keying Data ID#8 as input signal for Logic gate
AND / OR / XOR
-
Operation selection in Logic gate
0.000 - 300.000
s
On delay timer value
0.000 - 300.000
s
Off delay timer value
-
Binary signal inversion
-
Selection of Logic circuit
Off delay timer value for "Delay" and "Dwell"
0.000 - 300.000
s
circuit
-
Reset signal selection for "Latch" circuit
Contents
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6F2S1931 (0.20)
Default setting
Notes
value
Off
Not assigned
Not assigned
Not assigned
Not assigned
Not assigned
Not assigned
Not assigned
Not assigned
AND
0.000
0.000
Normal
Off
0.000
Not assigned
Off
Not assigned
Not assigned
Not assigned
Not assigned
Not assigned
Not assigned
Not assigned
Not assigned
AND
0.000
0.000
Normal
Off
0.000
Not assigned
........
Off
Not assigned
.......
Not assigned
AND
0.000
0.000
Normal
Off
0.000
Not assigned
Centralized GRB200
(Soft: 030, 031, 032, 033, 034)
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