Toshiba TC9349AFG Manual page 98

Cmos digital integrated circuit silicon monolithic
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2. A/D Converter Circuit Configuration
AD0
AD5
(V
doubled voltage)
DD
The A/D converter consists of a 6-bit D/A converter, a sample hold, a comparator, an A/D conversion latch and a control
circuit. The 6-bit D/A converter and the comparator operate only when the BUSY bit is "1". Therefore, the A/D converter
consumes no current when it is not operating. The half potential of V
The A/D converter operates on the doubled voltage V
Note: Set to "1" the I/O port –6 (N-ch open-drain) output data corresponding to the A/D input pin to be used, to
use the pin in the input state.
Note: The V
contant-voltage potential is used for the LCD driver driving voltage and the reference voltage of
EE
reduced-voltage detection circuit for the DC-DC converter for CPU and VT.
Note: Voltage of 0 V to V
Comparator
Sample
V
Control
circuit
STA BUSY
V
DB
V EE constant-voltage
circuit
DB
pin level can be applied to the A/D input pin.
DB
98
11
hold
12
SEL0~2
13
DD
BUSY
14
9
BUSY
constant voltage can be selected as the A/D input.
EE
× 2).
(V
DD
TC9349AFG
ADin1 (P6-0)
ADin2 (P6-1)
ADin3 (P6-2)
ADin4 (P6-3)
V
EE
2006-02-24

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