Toshiba TC9349AFG Manual page 14

Cmos digital integrated circuit silicon monolithic
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2. Address Stack Register (ASR)
The address stack register consists of 16 × 14 bits. When the subroutine call instruction is executed or an interrupt is
processed, this register stores a value equal to the contents of the program counter + 1 (that is, the return address).
Executing the return instruction (RN, RNS, RNI) loads the contents of the address stack register to the program counter.
There are 16 stack levels available and nesting occurs for up to 16 levels. The address stack register is mapped to I/O and
can be read/written by the input and output instructions.
3. ALU
The arithmetic and logic unit (ALU) has binary 4-bit parallel addition/subtraction functions, logical operation,
comparison and multiple bit judge functions. The CPU does not include an accumulator; all operations use the contents of
the data memory directly.
4. Program Memory (ROM)
The program memory consists of 16 bits × 8192 steps and is used for storing programs. The usable address range consists
of 8192 steps between addresses 0000H and 1FFFH.
The program memory divides the 8192 into eight separate steps and consists of pages 0 to 7. The JUMP and CALL
instructions can be freely used throughout all 8192 steps. When the data refer DAL (DAL instruction) is executed, the
program memory addresses 0000H to 03FFH (page 0) are used as data areas; when the indirect refer DAL instruction
(DALR instruction) is executed, the program memory addresses 0000H to 0FFFFH (pages 0 to 3) are used as data areas.
Execution of these instructions enables their 16-bit contents to be loaded into the data register.
Note: Set the data area in program memory to addresses outside the program loop.
Note: The program counter used to set the program memory has 14 bits and can specify a program memory up
to address 3FFF. Do not specify non-existing addresses from 2000H to 3FFFH.
ROM
16 bits
0000H
Page 0
(1-k steps)
0400H
Page 1
0800H
Page 2
0C00H
Page 3
1000H
Page 4
1400H
Page 5
1800H
Page 6
1C00H
Page 7
1FFFH
Vector addresses at interrupt
0000H Jump destination address at initialization
0001H
0002H
0003H
0004H
14
TC9349AFG
INTR1 pin
INTR2 pin / timer port
Serial interface / timer port /
decreased voltage detection
Timer counter
2006-02-24

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