Table of Contents
Advertisement
System clock control circuit
The system clock control circuit consists of a clock generator, clock generator control port, timing generator and backup
mode control circuit.
Ｒ
CO
X
OUT1
75 kHz
X
IN1
CI
Ｒ
X
OUT2
300 ∼
600 kHz
X
IN2
CI
Note: It is necessary to use a crystal resonator with a low CI value and favorable startup characteristics.
Note: Adjust and determine the external resistance and capacitor constant to match the crystal resonator
actually used.
Note: The low-speed oscillator and high-speed oscillator are equipped with a built-in Schmitt circuit.
Note: The power supply of the low-speed oscillator and high-speed oscillator uses a V
1. Clock generator
The clock generator circuit generates the basic clock used as the standard for the system clock supplied to a core-based
CPU and peripheral hardware. The circuit incorporates low-speed and high-speed oscillators, with a 75 kHz crystal
resonator connected to the X
the X
to X
pin.
IN2
OUT2
The CPU clock and doubler clock (V
through programming. Since items such as the timer and reference frequency utilize the 75 kHz clock during this time, the
timer duration measurement and PLL are unaffected.
Clock generator
Low-speed
oscillator
High-speed
oscillator
V
DD
and X
pin and a 300 to 600 kHz ceramic resonator or a crystal resonator connected to
IN1
OUT1
doubler or doubler for VT) can be converted to a high-speed oscillation clock
DB
29
Clock generator
Backup mode
control port
control circuit
φ
(
L15F)
Peripheral timing generator
CPU timing generator
DD
TC9349AFG
Peripheral clock
CPU clock
pin.
2006-02-24
Advertisement
Table of Contents
