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Description of Operations
CPU
The CPU consists of a program counter, a stack register, an ALU, program memory, data memory, a G-register, a data
register, a DAL address register, a carry flip-flop (F/F), a judge circuit, interrupt stack register and an interrupt circuit.
1.
Program Counter (PC)
The program counter is a 14-bit binary up-counter used to address program memory (ROM). The program counter is
cleared by a system reset and starts from address 0.
The PC is normally incremented by 1 at the execution of each instruction. However, executing a Jump or Call instruction
loads the address specified in the operand of the instruction to the PC.
When an instruction with a skip function (the AIS, SLTI, TMT, RNS instructions, etc.) is executed and the result of the
instruction satisfies the skip condition, the PC is incremented by 2 and the next instruction is skipped.
When an interrupt is received, the system loads the vector address corresponding to the interrupt.
Note: The program memory (ROM) uses the address range 0000H to 1FFFH. Access to addresses outside this
range is prohibited.
Instruction
JUMP ADDR1
CALL ADDR2
DAL ADDR3, (r)
(DAL bit = 0)
DAL (DA)
(DAL bit = 1)
RN, RNS, RNI
When interrupt received
Power-on reset, reset by
RESET pin
PC13 PC12 PC11 PC10 PC9
0
0
0
0
0
0
0
0
0
0
0
Interrupt source
INTR1 pin
INTR2 pin / Timer port
Serial interface / timer port / decreased voltage detection
Timer counter
Contents of program counter (PC)
PC8
PC7
PC6
PC5
Instruction operand (ADDR1)
Instruction operand (ADDR2)
Instruction operand (ADDR3)
DAL address register (AR)
Contents of stack register
Vector addresses for interrupt
0
0
0
0
13
TC9349AFG
PC4
PC3
PC2
PC1
PC0
Contents of general
register (r)
0
0
0
0
0
Vector address
0001H
0002H
0003H
0004H
2006-02-24
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