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1-2. Examples of Serial Mode Settings
Examples of settings in the 3-wire, 2-wire and UART modes are shown below. Adjust settings according to the required
specifications.
(1)
Example of 3-wire serial mode setting
Setting bit
M0, M1
CK0, CK1, OSC0, OSC1
MASTER
POL
NchS
SIS
STPS
SWENA
MSB
SOS
STA0~3
STP0~3
PSEL, SIO
•
Example of serial interface timing in the 3-wire master mode
シリアルクロック
Serial clock
出力 SCK1)
（
output (SCK1)
Serial
シリアル入出力
input/output
（ SDIO1)
(SDIO1)
シリアル出力
Serial output
カウンタ
counter
（
OTC0 OTC3)
～
(OTC0 to OTC3)
Serial input
シリアル入力
counter
カウンタ
(ITC0 to ITC3)
（
ITC0 ITC3)
～
Execution of
命令の実行
instruction
STP="1"実行
STP= "1" execution
BUSY1
•
Example of serial interface timing in the 3-wire slave mode
シリアルクロック
Serial clock
入力 SCK1)
（
output (SCK1)
Serial
シリアル入出力
SO8
input/output
（ SDIO1)
(SDIO1)
シリアル出力
Serial output
カウンタ
counter
（
OTC0 OTC3)
～
(OTC0 to OTC3)
Serial input
シリアル入力
counter
カウンタ
(ITC0 to ITC3)
（
ITC0 ITC3)
～
Execution of
命令の実行
instruction
BUSY1
RX F/F
3-wire setting (M0 = 0, M1 = 1)
Serial clock frequency setting
Master setting (MASTER = 1): Refer to an example of master operation timing.
Slave setting (MASTER = 0): Refer to an example of slave operation timing.
Serial clock stop state = L 、
Data output at the rising edge and data input at the falling edge (POL = 0)
CMOS setting (NchS = 0)
Setting of SDIO pin to serial input (SIS = 0)
Setting of stop condition to input counter (STPS = 0)
Stop weight disabled (SWENA = 0)
Output beginning with the least significant bit (MSB = 0)
Data output: SOS = 1, Data input: SOS = 0
Serial input/output start data: 0h
Serial input/output stop data: 8h
Select CMOS pin (SDIO1, SCK1) (PSEL = 0, SIO = 1)
１
2
3
SO8
SO0
SO1
SO2
データ出力
Data output
８
０
１
２
８
０
１
２
Serial clock stop
シリアルクロック停止
Issue of interruption
１
2
3
SI0
SI1
SI2
HZ
データ入力
Data input
８
０
１
２
８
０
１
２
83
Condition setting data
8
１
2
SO7
SI0
SI1
HZ
データ入力
Data input
７
０
１
７
８
０
１
割り込み発行
8
１
2
SI7
SO0
SO1
SO7
HZ
データ出力
Data output
６
７
０
１
７
８
０
１
TC9349AFG
8
SI7
SO7
HZ
７
７
８
SOS="1"設定
8
SO7
HZ
６
７
７
８
2006-02-24
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