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INTR1 input
Timer clock
Timer counter data
01H 02H
Coincidence pulse
Counter reset pulse
External interruption pulse
Example of timing of pulse width detection operation in pulse width
INTR1 input
Timer clock
Timer counter data
Coincidence pulse
Reading of counter data
Instruction execution
External interruption pulse
Example of timing of pulse width detection operation in pulse width
Note: The counter is reset whenever the CR bit is set to "1". Execute reset if necessary.
Note: The end of measurement can be detected through the concomitant use of external interrupt.
03H
00H
01H
External interruption issue
measurement mode (CR Disable = "0")
01H 02H
03H
00H
01H
CR="1"
External interruption issue
measurement mode (CR Disable = "1")
57
02H
03H
ID(n-1)
IDn
Interrupt is issued if counter data and
When the counter data is corresponding to the agreement
coincidence data correspond
data, it issues it interrupt.
02H
03H
ID
IDn
(n-1)
Interrupt is issued if counter data and
When the counter data is corresponding to the
coincidence data correspond
agreement data, it issues it interrupt.
Reading of counter data
TC9349AFG
ID(n+1) ID(n+2)
00H
ID
ID
00H
(n+1)
(n+2)
CR="1"
2006-02-24
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