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Instruction
Skip
Mnemonic
Set
Function
TMTR
r, M
*
TMFR
r, M
*
TMT
M, N
*
TMF
M, N
*
TMTN
M, N
*
TMFN
M, N
*
SKP
*
SKPN
*
CALL ADDR2
RN
RNS
*
JUMP ADDR1
DI
EI
RNI
Note: The IMF bit is an interrupt master enable flag located on the I/O map. (Refer to Interrupt Functions.)
Function
Operation
Test general
register bits by
Skip if r [N (M)] = all
memory bits, then
"1"
skip if all bits
specified are true
Test general
register bits by
Skip if r [N (M)] = all
memory bits, then
"0"
skip if all bits
specified are false
Test memory bits,
Skip if M (N) = all "1"
then skip if all bits
specified are true
Test memory bits,
then not skip if all
Skip if M (N) = all "0"
bits specified are
false
Test memory bits,
Skip if M (N) = not all
then skip if all bits
"1"
specified are true
Test memory bits,
Skip if M (N) = not all
then not skip if all
bits specified are
"0"
false
Skip if carry flag is
Skip if (CY) = 1
true
Skip if carry flag is
Skip if (CY) = 0
false
ASR ← (PC) 1 and
PC ← ADDR2
Call subroutine
ASP ←(ASP) + 1
PC ← (ASR)
Return to main
ASP ←(ASR) - 1
routine
Return to main
PC ← (ASR) and skip
routine and skip
ASP ←(ASR) - 1
unconditionally
Jump to address
PC ← ADDR1
specified
(Note) IMF ← 0
Reset IMF
(Note) IMF ← 1
Set IMF
PC ← (ASR)
PC ← (ASR) – 1
Return to main
Ca, G, DATA, DATA
routine and set IMF
SELECT ← (ISR)
(Note)
ISP ← (ISP) – 1
IMF ← 1
21
TC9349AFG
Machine Language (16 Bits)
IC
A
B
(6 Bits)
(2 Bits)
(4 Bits)
010000
DR
DC
010001
DR
DC
110101
DR
DC
110111
DR
DC
110100
DR
DC
110110
DR
DC
⎯
111111
00
⎯
111111
01
101
ADDR2 (13 bits)
⎯
111111
10
⎯
111111
11
10
ADDR1 (13 bits)
⎯
111111
00
⎯
111111
01
⎯
111111
11
2006-02-24
C
(4 Bits)
RN
RN
N
N
N
N
0011
0011
0011
0011
0111
0111
0111
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