Toshiba TC9349AFG Manual page 124

Cmos digital integrated circuit silicon monolithic
Table of Contents

Advertisement

Constant Voltage Output (V
Characteristics
Doubled output
Clamp doubled voltage setting error
Constant voltage
Programmable Counter, IF Counter Operating Frequency Range
Characteristics
HF mode
LF mode
Operating frequency
IFin1
range
IFin2
HF mode
LF mode
Input amplitude range
IFin1
IFin2
Input amplifier feedback resistance
* : Guaranteed when V
DD
), Voltage Doubled Output (V
EE
Test
Symbol
Circuit
V
DB1
V
DB2
V
DB3
V
DB4
V
LCD
∆V
DB
V
EE
Test
Symbol
Circuit
f HF
f LF
f IF1
f IF2
V
HF
V
LF
V
IF1
V
IF2
Rf
IN1
Rf
IN2
= V
= 0.9 - 1.8 V, V
= 1.2 - 3.6 V, and Ta = − 10 to 60°C.
PLL
CPU
124
LCD
Test Condition
(V
) GND reference
DB
Clamp off, Charge pump
voltage
(V
) GND reference
DB
Clamp voltage = 2.0 V setting
(V
) GND reference
DB
Clamp voltage = 2.5 V setting
(V
) GND reference
DB
Clamp voltage = 3.0 V setting
(V
) GND reference
LCD
(V
) When the charge pump
DB
pressure is increased
V EE = 1.5 V
(V
) When the switching
DB
regulator pressure is increased
V EE = 1.5 V
(V
) GND reference
(*)
EE
Test Condition
= 0.1 ~ 0.6 V
(OSCin) V
(*)
IN
p-p
= 0.1 ~ 0.6 V
(OSCin) V
(*)
IN
p-p
= 0.1 ~ 0.6 V
(IFin) V
(*)
IN
p-p
NC = 0 setting
= 0.1 ~ 0.6 V
(IFin) V
(*)
IN
p-p
NC = 1 setting
= 1.0 ~ 30 MHz (*)
(OSCin) f
IN
= 0.5 ~ 4 MHz
(OSCin) f
(*)
IN
= 0.35 ~ 12 MHz
(IFin) f
(*)
IN
NC = 0 setting
= 0.03 ~ 1 MHz
(IFin) f
(*)
IN
NC = 1 setting
(OSCin)
(IFin)
TC9349AFG
)
Min
Typ.
Max
Unit
×
V
DD
2
2.0
V
2.5
3.0
×
V
EE
2
0.05
V
±0.05
1.46
1.50
1.54
V
Min
Typ.
Max
Unit
1.0
~
30
0.5
~
4
MHz
0.35
~
12
0.03
~
1
0.1
~
0.6
0.1
~
0.6
V
p-p
0.1
~
0.6
0.1
~
0.6
250
500
1000
kΩ
250
500
1000
kΩ
2006-02-24

Advertisement

Table of Contents
loading

Table of Contents