Toshiba TC9349AFG Manual page 96

Cmos digital integrated circuit silicon monolithic
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LCD output waveform in the 1/3 bias mode (BIAS bit= "1")
The potential of the LCD driver waveform is outputted as V
1/3 and 2/3 of potential V
S1
S2
DISP OFF
8ms(125kHz)
1ms
COM1
COM2
COM3
COM4
S1
S2
COM1-S1
COM1-S1
(ON waveform)
(ON波形)
COM2-S1
COM2-S1
(Off waveform)
(OFF波形)
Note:
Setting the DISP OFF bit to "1" outputs unselected waveforms as common and segment
outputs.
Note:
All the common and segment outputs are fixed to the "L" level in the clock stop mode and for
100 ms after this is released.
Note:
In the 1/3 bias mode, the frame frequency is twice as high as that in the 1/2 bias mode.
In the 1/3 bias mode, the consumption current becomes about 100 µs larger than that in the 1/2
Note:
bias mode.
are outputted at a frame frequency of 125 Hz.
LCD
COM1
COM2
COM3
COM4
96
and GND, and the intermediate potential levels,
LCD
セグメントデータ例
Example of segment data
セグメントデータ1(φL13 φL14)
Segment data 1(φL13, φL14)
Y1
Y2
Y4
COM1 COM2 COM3 COM4
0
(S1)
1
0
1
COM1 COM2 COM3 COM4
1
(S2)
1
1
0
データセレクト(φL/K1A)
Data select(φL/K1A)
TC9349AFG
Y8
0
1
VLCD
VLCD×2/3
VLCD×1/3
GND
VLCD
VLCD×2/3
VLCD×1/3
GND
VLCD
VLCD×2/3
VLCD×1/3
GND
VLCD
VLCD×2/3
VLCD×1/3
GND
VLCD
VLCD×2/3
VLCD×1/3
GND
VLCD
VLCD×2/3
VLCD×1/3
GND
VLCD
VLCD×1/3
GND
- VLCD×1/3
- VLCD
VLCD
VLCD×1/3
GND
- VLCD×1/3
- VLCD
2006-02-24

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