Toshiba TC9349AFG Manual page 3

Cmos digital integrated circuit silicon monolithic
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Pin Assignment
IFin/IN
V
PLL
OSCin
GND (PLL)
DO1/OT1/P
DO2/OT2/N/Tin
P9-0/Tout
MUTE/P9-1
P9-2/DDCK2/TEST
P8-0/VDET (BRK13)
P8-1/SI2/DDCK1 (BRK14)
P8-2/SCK2/RX2 (BRK15)
P8-3/SDIO2/TX2 (BRK16)
RESET
GND
Xin1
48
47
46
45
44
43
Electronic volume
49
50
CMOS I/O port (34)
51
52
53
54
N-ch open drain
55
I/O port (1)
56
CMOSI/O port (2)
57
58
59
60
61
62
63
Oscillation
64
circuit
Doubler/regular circuit
1
2
3
4
5
6
42
41
40
39
38
37
36
35
SIO1
Pull-up/pull-down
SVFP64
(0.5 mm pitch)
Top - view
N-ch open drain
I/O port (4)
A/D (4ch)
7
8
9
10
11
12
13
14
3
TC9349AFG
34
33
32
P15-1/S14
31
P15-0/S13
30
P14-3/S12
29
P14-2/S11
28
P14-1/S10
27
P14-0/S9
26
P13-3/S8
25
P13-2/S7
24
P13-1/S6
23
P13-0/S5
22
P12-3/S4
21
P12-2/S3
20
P12-1/S2
19
P12-0/S1
18
P10-3/COM4
17
P10-2/COM3
15
16
2006-02-24

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