Toshiba TC9349AFG Manual page 104

Cmos digital integrated circuit silicon monolithic
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UNLOCK
φL27
PN
POL
RESET
Y1
Y2
Y4
φK27
Unfixed Unfixed
F/F
ENA
不定
Y4/Y8 bits of the unlock port ( φ K27) become unfixed.
Note:
The phase comparator control port and the unlock detection ports are accessed by using the OUT2 instruction with [CN =
4H, 5H, 6H, 7H] and the IN2 instruction with [CN = 7H] specified in the operand. These control bits are reset to "0" after a
system reset.
Output mode setting (M0 and M1 bits)
The M0 and M1 bits are used for setting the phase comparator output (DO1/2 output pin) state. The phase
comparator output, the "H" and "L" levels and high impedance (HZ) state can be set.
Note:
If the PLL off mode is selected, the "HZ" will be retained in the phase comparator output state,
and the "H"/"L" level will be retained when the "H"/"L" level is selected.
When PN = "1" is selected, the PN output mode has the priority.
Note:
Output resistance setting (R0 and R1 bits)
The R0 and R1 bits are used for setting the output resistance of the phase comparator output individually for DO1
and DO2 pins. They can be set to four states; the normal output buffer state, 5 kΩ, 50 kΩ and 100 k Ω .
Note:
The output resistance is set regardless of the output mode (M0, M1) and the PN output mode.
Therefore, set these bits to "0" when the "H"/"L" level or the PN output mode is selected.
Note:
When the DO2 pin is set to the automatic phase difference switching mode, the R0/R1 bits of
DO2 control 1 becomes to the "don't care" state.
LPF
ON
内蔵LPF制御
Built-in LPF control
Selection of PN output logic
PN出力論理選択
PN output control
PN出力制御
Unlock reset
アンロックリセット・・・データ"1"をセットするたびにアンロックF/Fとアンロック
             イネーブルをリセットする
Y8
不定
Unlock enable
アンロックイネーブル
Unlock detection bit
アンロック検出ビット
104
: 0 オフ
0: Off
: 1 オン
1: On
: 0 正論理
0: Positive logic
: 1 負論理
1: Negative logic
0: Prohibition
: 0 禁止
1: Enabled
: 1 許可
Unlock F/F and Unlock enable are reset each
time the data is set to "1".
: 0 PLLアンロック検出待ち状態
0: PLL unlock detection standby
: 1 PLLアンロック検出が可能
1: PLL unlock detection enabled
: 0 PLLロック状態
0: PLL lock state
: 1 PLLアンロック状態
1: PLL unlock state
TC9349AFG
2006-02-24

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