Toshiba TC9349AFG Manual page 24

Cmos digital integrated circuit silicon monolithic
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Data port (φL10 to 16, φK10 to 11) on the I/O map is divided into 16 and indirectly specified by the contents of the data
select port (φL/K1A). The indirectly specified port is accessed by the OUT1 instruction with the operand [CN = 0 to 6H] or
IN1 instruction with the operand [CN = 0 to 1H]. Whenever the data select port accesses the data port, it is automatically
incremented by 1.
The data select port has a 4-bit interrupt stack register. When an interrupt request is generated, the 4 bits in the data select
port are evacuated to the interrupt stack register specified by the interrupt stack pointer, and returned to the data select port
during execution of the RNI instruction.
φL/K10(6)
Y1
Y2
Y4
ISP0
ISP1
*/0
Interrupt stack pointer
0
Interrupt processing
φL/K1A
< Indirect specification by the data selection port >
Y8
*/0
φL/K10(A)
ISRS0
ISRS2
ISRS4
ISRS8
1
2
3
Interrupt stack register
Execution of the RIN
instruction
Y1
Y2
Y4
Y8
SEL1
SEL2
SEL4
SEL8
Data select
24
TC9349AFG
φL10 ∼ φL15, φK10 ∼ φK11
Y1
Y2
Y4
Y8
(0)
(1)
(2)
(F)
2006-02-24

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