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Philips Semiconductors
Volume 1
Two match registers can be used to provide a single edge controlled PWM output on the
MATn.2..0 pins. Because the MAT2.3 register is not pinned out on Timer2, it is
recommended to use the MRn.3 registers to control the PWM cycle length. One other
match register is needed to control the PWM edge position. The remaining two match
registers can be used to create PWM output with the PWM cycle rate determined by
MRn.3.
16.4 Pin description
Table 174
Table 174: Timer/Counter pin description
Pin
CAP2.2..0
MAT2.2..0
MAT3.3..0
16.5 Register description
Each Timer/Counter contains the registers shown in
follow.
User manual
gives a brief summary of each of the Timer/Counter related pins.
Type
Description
Input
Capture Signals- A transition on a capture pin can be configured to
load one of the Capture Registers with the value in the Timer Counter
and optionally generate an interrupt.
Here is the list of all CAPTURE signals together with pins on where
they can be selected:
•
CAP2.0: P0.27
•
CAP2.1: P0.28
•
CAP2.2: P0.29
Timer/Counter block can select a capture signal as a clock source
instead of the PCLK derived clock. For more details see
"Count Control Register (CTCR, TIMER2: T2CTCR - 0xE007 0070
and TIMER3: T3TCR - 0xE007 4070)" on page
Output
External Match Output 0/1- When a match register 0/1 (MR3:0) equals
the timer counter (TC), this output can either toggle, go LOW, go
HIGH, or do nothing. The External Match Register (EMR) and the
PWM Control Register (PWMCON) control the functionality of this
output.
Here is the list of all MATCH signals together with pins on where they
can be selected:
•
MAT2.0: P0.7
•
MAT2.1: P0.8
•
MAT2.2: P0.9
•
MAT3.0: P0.21
•
MAT3.1: P0.13
•
MAT3.2: P0.14
•
MAT3.3: P0.15
Rev. 01 — 12 January 2006
UM10161
Chapter 16: Timer2 and Timer3
Section 16.5.3
204.
Table
175. More detailed descriptions
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
201
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