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have them come up as GPIO pins, do not connect a bias resistor, and ensure that any
external driver connected to Pin 26 (RTCK) is either driving high or is in high-impedance
state during Reset.
20.6 Register description
The EmbeddedICE logic contains 16 registers as shown in
ARM7TDMI-S debug architecture is described in detail in "ARM7TDMI-S (rev 4) Technical
Reference Manual" (ARM DDI 0234A) published by ARM Limited.
Table 237: EmbeddedICE logic registers
Name
Debug Control
Debug Status
Debug Comms Control Register
Debug Comms Data Register
Watchpoint 0 Address Value
Watchpoint 0 Address Mask
Watchpoint 0 Data Value
Watchpoint 0 Data Mask
Watchpoint 0 Control Value
Watchpoint 0 Control Mask
Watchpoint 1 Address Value
Watchpoint 1 Address Mask
Watchpoint 1 Data Value
Watchpoint 1 Data Mask
Watchpoint 1 Control Value
Watchpoint 1 Control Mask
20.7 Block diagram
The block diagram of the debug environment is shown below in
User manual
Width Description
6
Force debug state, disable interrupts
5
Status of debug
32
Debug communication control register
32
Debug communication data register
32
Holds watchpoint 0 address value
32
Holds watchpoint 0 address mask
32
Holds watchpoint 0 data value
32
Holds watchpoint 0 data mask
9
Holds watchpoint 0 control value
8
Holds watchpoint 0 control mask
32
Holds watchpoint 1 address value
32
Holds watchpoint 1 address mask
32
Holds watchpoint 1 data value
32
Holds watchpoint 1 data mask
9
Holds watchpoint 1 control value
8
Holds watchpoint 1 control mask
Rev. 01 — 12 January 2006
UM10161
Chapter 20: EmbeddedICE
Table 237
below. The
Address
00000
00001
00100
00101
01000
01001
01010
01011
01100
01101
10000
10001
10010
10011
10100
10101
Figure
64.
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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