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1.1 Introduction
The LPC2101/02/03 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S CPU with
real-time emulation that combines the microcontroller with 8 kB, 16 kB, or 32 kB of
embedded high speed flash memory. A 128-bit wide memory interface and a unique
accelerator architecture enable 32-bit code execution at the maximum clock rate. For
critical performance in interrupt service routines and DSP algorithms, this increases
performance up to 30 % over the Thumb mode. For critical code size applications, the
alternative 16-bit Thumb mode reduces code by more than 30 % with minimal
performance penalty.
Due to their tiny size and low power consumption, LPC2101/02/03 are ideal for
applications where miniaturization is a key requirement, such as access control and
point-of-sale. A blend of serial communications interfaces, ranging from multiple UARTS,
SPI, and SSP to two I
well suited for communication gateways and protocol converters. The superior
performance also makes these devices suitable as math coprocessors. Various 32-bit and
16-bit timers, an improved 10-bit ADC, PWM features through output match on all timers,
and 32 fast GPIO lines with up to 13 edge or level sensitive external interrupt pins make
these microcontrollers particularly suitable for industrial control and medical systems.
1.2 Features
User manual
UM10161
Chapter 1: General information
Rev. 01 — 12 January 2006
2
Cs, and on-chip SRAM of 2 kB/4 kB/8 kB make these devices very
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16-bit/32-bit ARM7TDMI-S microcontroller in a tiny LQFP48 package.
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2 kB/4 kB/8 kB of on-chip static RAM and 8 kB/16 kB/32 kB of on-chip flash program
memory. 128-bit wide interface/accelerator enables high-speed 70 MHz operation.
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In-System/In-Application Programming (ISP/IAP) via on-chip boot loader software.
Single flash sector or full chip erase in 100 ms and programming of 256 bytes in 1 ms.
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EmbeddedICE RT offers real-time debugging with the on-chip RealMonitor software.
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The 10-bit A/D converter provides eight analog inputs, with conversion times as low
as 2.44 µs per channel, and dedicated result registers to minimize interrupt overhead.
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Two 32-bit timers/external event counters with combined seven capture and seven
compare channels.
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Two 16-bit timers/external event counters with combined three capture and seven
compare channels.
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Low power Real-Time Clock (RTC) with independent power and dedicated 32 kHz
clock input.
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Multiple serial interfaces including two UARTs (16C550), two Fast I
(400 kbit/s), SPI and SSP with buffering and variable data length capabilities.
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Vectored interrupt controller with configurable priorities and vector addresses.
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Up to thirty-two 5 V tolerant fast general purpose I/O pins.
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Up to 13 edge or level sensitive external interrupt pins available.
Rev. 01 — 12 January 2006
User manual
2
C-buses
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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