Figure 10.1 (2) Block Diagram Of Cpg (Sh7750R) - Hitachi SH7750 Hardware Manual

Sh7750 series superh risc engine
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Oscillator circuit
Crystal
XTAL
oscillator
EXTAL
MD8
CKIO
CPG control unit
MD2
MD1
MD0
FRQCR:
STBCR:
STBCR2:
Rev. 6.0, 07/02, page 250 of 986
PLL circuit 1
× 6
× 12
PLL circuit 2
× 1
Clock frequency
control circuit
FRQCR
Bus interface
Internal bus
Frequency control register
Standby control register
Standby control register 2

Figure 10.1 (2) Block Diagram of CPG (SH7750R)

Frequency
divider 2
× 1
× 1/2
× 1/3
× 1/4
× 1/6
× 1/8
Standby control
circuit
STBCR
STBCR2
CPU clock (Iø)
cycle Icyc
Peripheral module
clock (Pø) cycle
Pcyc
Bus clock (Bø)
cycle Bcyc

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