Toshiba GR-200 Series Instruction Manual page 558

Multi functional protection ied

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Threshold level

To sense an input signal securely, a potential divider is provided at the front circuit. If input

level is greater than a pick-up threshold, BI circuit will generate a detection signal. The

sensitivity can be adjusted with settings [BITH1], [BITH2] and [BITH]. Note the settings are

different and depending on BI circuits, as shown in Table 5.6-3.

Table 5.6-3 Threshold settings on IO slots

BIO modules Relevant circuits

BI3 through BI15

BI1 through BI8

BI1 through BI8

Figure 5.6-7 illustrates the feature. It can neglect contact chattering. Period 't' illustrates to

neglect the chattering; a counting number should be set for the [CMP_NUM]:

The setting [CMP_NUM] is the common to all inputs.

Detected signal on BI

Figure 5.6-7 Chattering countermeasure (e.g. [CMP_NUM] = 4)

Set On for setting [BI*_CPL] for respective circuits, if binary input circuits should work

depending on delay and inversion settings. Conversely, set Off if the settings are not required.

Delayed pick-up / delayed drop-off

On-delay and Off-delay timers is provided for each binary input circuit, where the user can

adjust the operation timing. Use settings [On Delay Timer] and [Off Delay Timer].

Logic level inversion

For each BI circuit, the user can invert the pickup signal with setting. When the inversion is

required, set Inverse for setting [INVERSE-SW]. Normal is for non-inversion.

[ CPM_NUM ] ×

System⁡Frequency×12

Actual input signal

Selected items (a pick-up level)

Level_11(55V), Level_12(110V), Level_13(125V), Level_14(220V)

Level_21(110V), Level_22(125V), Level_23(220V)

Level_1(110V), Level_2(125V), Level_3(220V)

6F2T0200 (0.15)

GRE200 (1,2)

Chapters

Gre200-1 Gre200-2