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Signal/Connection Descriptions
Power
2.2
POWER
Power Name
V
PLL Power—V
CCP
provided with an extremely low impedance path to the V
V
(4)
Quiet Core (Low) Power—V
CCQL
externally to all other V
must provide adequate external decoupling capacitors. There are four V
V
(3)
Quiet External (High) Power—V
CCQH
other chip power inputs.The user must provide adequate decoupling capacitors. There are three V
V
(3)
Address Bus Power—V
CCA
externally to all other chip power inputs. The user must provide adequate external decoupling capacitors. There are
three V
CCA
V
(4)
Data Bus Power—V
CCD
externally to all other chip power inputs. The user must provide adequate external decoupling capacitors. There are
four V
CCD
V
(2)
Bus Control Power—V
CCC
all other chip power inputs. The user must provide adequate external decoupling capacitors. There are two V
inputs.
V
Host Power—V
CCH
chip power inputs. The user must provide adequate external decoupling capacitors. There is one V
V
(2)
SHI, ESAI, ESAI_1, DAX and Timer Power —V
CCS
Timer. This input must be tied externally to all other chip power inputs. The user must provide adequate external
decoupling capacitors. There are two V
2.3
GROUND
Ground Name
GND
PLL Ground—GND
P
low-impedance path to ground. V
possible to the chip package. There is one GND
GND
(4)
Quiet Ground—GND
Q
externally to all other chip ground connections. The user must provide adequate external decoupling capacitors.
There are four GND
2-4
Table 2-2 Power Inputs
is V
dedicated for PLL use. The voltage should be well-regulated and the input should be
CCP
CC
is an isolated power for the internal processing logic. This input must be tied
CCQL
power pins and the V
CCQL
is a quiet power source for I/O lines. This input must be tied externally to all
CCQH
is an isolated power for sections of the address bus I/O drivers. This input must be tied
CCA
inputs.
is an isolated power for sections of the data bus I/O drivers. This input must be tied
CCD
inputs.
is an isolated power for the bus control I/O drivers. This input must be tied externally to
CCC
is an isolated power for the HDI08 I/O drivers. This input must be tied externally to all other
CCH
inputs.
CCS
Table 2-3 Grounds
is a ground dedicated for PLL use. The connection should be provided with an extremely
P
should be bypassed to GND
CCP
is an isolated ground for the internal processing logic. This connection must be tied
Q
connections.
Q
DSP56367
Description
power rail. There is one V
CC
power pin only. Do not tie with other power pins. The user
CCP
inputs.
CCQL
is an isolated power for the SHI, ESAI, ESAI_1, DAX and
CCS
Description
by a 0.47 µF capacitor located as close as
P
connection.
P
input.
CCP
inputs.
CCQH
CCC
input.
CCH
MOTOROLA
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