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Enhanced Serial Audio Interface (ESAI)
ESAI Data and Control Pins
input when data is being received by the RX3 shift register. SDO2/SDI3 is an output when
data is being transmitted from the TX2 shift register. In the on-demand mode with an
internally generated bit clock, the SDO2/SDI3 pin becomes high impedance for a full clock
period after the last data bit has been transmitted, assuming another data word does not follow
immediately. If a data word follows immediately, there is no high-impedance interval.
SDO2/SDI3 may be programmed as a general-purpose I/O pin (PC9) when the ESAI SDO2
and SDI3 functions are not being used.
10.2.4
SERIAL TRANSMIT 3/RECEIVE 2 DATA PIN (SDO3/SDI2)
SDO3/SDI2 is used as the SDO3 signal for transmitting data from the TX3 serial transmit
shift register when programmed as a transmitter pin, or as the SDI2 signal for receiving serial
data to the RX2 serial receive shift register when programmed as a receiver pin. SDO3/SDI2
is an input when data is being received by the RX2 shift register. SDO3/SDI2 is an output
when data is being transmitted from the TX3 shift register. In the on-demand mode with an
internally generated bit clock, the SDO3/SDI2 pin becomes high impedance for a full clock
period after the last data bit has been transmitted, assuming another data word does not follow
immediately. If a data word follows immediately, there is no high-impedance interval.
SDO3/SDI2 may be programmed as a general-purpose I/O pin (PC8) when the ESAI SDO3
and SDI2 functions are not being used.
10.2.5
SERIAL TRANSMIT 4/RECEIVE 1 DATA PIN (SDO4/SDI1)
SDO4/SDI1 is used as the SDO4 signal for transmitting data from the TX4 serial transmit
shift register when programmed as transmitter pin, or as the SDI1 signal for receiving serial
data to the RX1 serial receive shift register when programmed as a receiver pin. SDO4/SDI1
is an input when data is being received by the RX1 shift register. SDO4/SDI1 is an output
when data is being transmitted from the TX4 shift register. In the on-demand mode with an
internally generated bit clock, the SDO4/SDI1 pin becomes high impedance for a full clock
period after the last data bit has been transmitted, assuming another data word does not follow
immediately. If a data word follows immediately, there is no high-impedance interval.
SDO4/SDI1 may be programmed as a general-purpose I/O pin (PC7) when the ESAI SDO4
and SDI1 functions are not being used.
10-4
DSP56367
MOTOROLA
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