Table of Contents
Advertisement
SECTION
13
TIMER/ EVENT COUNTER
13.1
INTRODUCTION
This section describes the internal timer/event counter in the DSP56367. Each of the three
timers (timer 0, 1 and 2) can use internal clocking to interrupt the DSP56367 or trigger DMA
transfers after a specified number of events (clocks). In addition, timer 0 provides external
access via the bidirectional signal TIO0.
When the TIO0 pin is configured as an input, timer 0 can count or capture events, or measure
the width or period of an external signal. When TIO0 is configured as an output, timer 0 can
function as a timer, a watchdog timer, or a pulse width modulator. TIO0 can also function as a
GPIO signal.
13.2
TIMER/EVENT COUNTER ARCHITECTURE
The timer module is composed of a common 21-bit prescaler and three independent general
purpose 24-bit timer/event counters, each having its own register set.
13.2.1
TIMER/EVENT COUNTER BLOCK DIAGRAM
Figure 13-1 shows a block diagram of the timer/event counter. This module includes a 24-bit
timer prescaler load register (TPLR), a 24-bit timer prescaler count register (TPCR), a 21-bit
prescaler clock counter, and three timers. Each of the three timers may use the prescaler clock
as its clock source.
MOTOROLA
DSP56367
13-1
Advertisement
Table of Contents
