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Philips Semiconductors
ARM-based Microcontroller
Table 91: UART1 Divisor Latch MSB Register (U1DLM - 0xE0010004 when DLAB = 1)
U1DLM
Function
Divisor Latch
7:0
MSB Register
UART1 Interrupt Enable Register (U1IER - 0xE0010004 when DLAB = 0)
The U1IER is used to enable the four interrupt sources.
Table 92: UART1 Interrupt Enable Register Bit Descriptions (U1IER - 0xE0010004 when DLAB = 0)
U1IER
Function
RBR Interrupt
0
Enable
THRE Interrupt
1
Enable
Rx Line Status
2
Interrupt Enable
Modem Status
3
Interrupt Enable
7:4
Reserved
UART1
The UART1 Divisor Latch MSB Register, along with the U1DLL register, determines the
baud rate of the UART1.
0: Disable the RDA interrupt.
1: Enable the RDA interrupt.
U1IER0 enables the Receive Data Available interrupt for UART1. It also controls the
Receive Time-out interrupt.
0: Disable the THRE interrupt.
1: Enable the THRE interrupt.
U1IER1 enables the THRE interrupt for UART1. The status of this interrupt can be read
from U1LSR5.
0: Disable the Rx line status interrupts.
1: Enable the Rx line status interrupts.
U1IER2 enables the UART1 Rx line status interrupts. The status of this interrupt can be
read from U1LSR[4:1].
0: Disable the modem interrupt.
1: Enable the modem interrupt.
U1IER3 enables the modem interrupt. The status of this interrupt can be read from
U1MSR[3:0].
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
LPC2119/2129/2292/2294
Description
Description
125
Preliminary User Manual
Reset
Value
0
Reset
Value
0
0
0
0
NA
January 08, 2004
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