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2.2.3
Scheme Logic
As shown in Figure 2.2.4 to Figure 2.2.9, OC2 to OC4 and EF2 to EF4 have independent scheme
logics. OC2 and EF2 provide the same logic of OC1 and EF1. OC3 and EF3 give trip signals OC3
TRIP and EF3 TRIP through delayed pick-up timers TOC3 and TEF3. OC4 and EF4 are used to
output alarm signals OC4 ALARM and EF4 ALARM. Each trip and alarm can be blocked by
incorporated scheme switches [OC2EN] to [EF4EN] and binary input signals OC2 BLOCK to EF4
BLOCK. OC*-D and EF*-D elements can be also blocked by the scheme switches [OC*-2F] and
[EF*-2F]. See Section 2.9.
A
OC2
B
-D
C
[OC2-2F]
+
"Block"
&
ICD
[MOC2]
+
"D"
"IEC"
"IEEE"
"US"
"C"
A
OC2
B
-I
C
[OC2EN
+
"ON"
OC2 BLOCK
1
Time (s)
OC1
OC2
Fuse
Figure 2.2.3 Staged Definite Time Protection
t
&
t
&
t
&
0.00 - 300.00s
&
&
&
&
Figure 2.2.4
Phase Overcurrent Protection OC2
18
OC3
TOC2
0
0
0
54
OC2-A
≥1
55
OC2-B
≥1
56
OC2-C
≥1
6 F 2 T 0 1 7 2
Current (amps)
106
OC2-A TRIP
≥1
107
OC2-B TRIP
≥1
108
OC2-C TRIP
≥1
105
≥1
OC2 TRIP
- Quick Links:
- Inverse Time Overcurrent Protection
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