Toshiba TLCS-900/H1 Series Manual page 4
Original cmos 32-bit microcontroller
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(9) USB (universal serial bus) controller: 1 channel
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Compliant with USB ver.1.1
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Full-speed (12 Mbps) (Low-speed is not supported.)
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Endpoints spec
Endpoint 0: Control 64 bytes* 1-FIFO
Endpoint 1: BULK (out) 64 bytes* 2-FIFO
Endpoint 2: BULK (in) 64 bytes* 2-FIFO
Endpoint 3: Interrupt (in) 8 bytes* 1-FIFO
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Descriptor RAM: 384 bytes
(10) I
S (Inter-IC sound) interface: 1 channel
2
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I
S bus mode/SIO mode selectable (Master, transmission only)
2
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32-byte FIFO buffer
(11) LCD controller
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Supports up to 4096 color for TFT, 256 color, 16, 8, 4 gray levels and B/W for STN
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Shift register/built-in RAM LCD driver
(12) SDRAM controller: 1 channel
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Supports 16 M, 64 M, 128 M, 256 M, and up to 512-Mbit SDR (Single Data Rate)-SDRAM
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Possible to execute instruction on SDRAM
(13) Timer for real-time clock (RTC)
(14) Key-on wakeup (Interrupt key input)
(15) 10-bit AD converter: 4 channels
(16) Touch screen interface
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Available to reduce external components
(17) Watchdog timer
(18) Melody/alarm generator
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Melody: Output of clock 4 to 5461 Hz
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Alarm: Output of 8 kinds of alarm pattern and 5 kinds of interval interrupt
(19) MMU
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Expandable up to 512 Mbytes (3 local area/8 bank method)
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Independent bank for each program, read data, write data and LCD display data
(20) Interrupts: 50 interrupt
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9 CPU interrupts:
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34 internal interrupts: Seven selectable priority levels
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7 external interrupts: Seven selectable priority levels (6-edge selectable)
(21) Input/output ports: 82 pins (Except Data bus (16bit), Address bus (24bit) and
(22) NAND flash interface: 2 channels
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Direct NAND flash connection capability
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ECC calculation (for SLC- type)
Software interrupt instruction and illegal instruction
92CH21-2
TMP92CH21
pin)
RD
2009-06-19
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