Toshiba TLCS-900/H1 Series Manual page 267
Original cmos 32-bit microcontroller
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(d-2) Isochronous receiving mode
Transaction format for Isochronous transfer type in receiving is given below.
•
Token: OUT
•
Data: DATA0
Control flow
Isochronous transfer type is frame management. And data that is written to
FIFO by OUT token is received to the CPU in the next frame.
Below are two conditions in FIFO of Isochronous receiving mode
transferring
X. FIFO for storing data received from host in present frame
(DATASET register bit = 0)
Y. FIFO for storing data for transmitting host in previous frame
(DATASET register bit = 1)
FIFO that is divided into two (packet A and packet B) conditions is whether
X condition or Y condition. The flow below explains X Condition (packet A)
and Y Condition (packet B) in present frame.
X and Y conditions change one after the other by receiving SOF.
Below is control flow in the UDC when receiving OUT token.
The whole transaction is processed by hardware.
1.
Token packet is received and address endpoint number error is confirmed,
and it checks whether the relevant endpoint transfer mode corresponds
with the OUT token. If it does not correspond, the state returns to IDLE.
2.
Condition of status register is confirmed.
•
INVALID condition: State returns to IDLE.
3.
Data packet is received.
Data is transferred from SIE into the UDC to packet A's FIFO (X
Condition).
4.
After last data was transferred, and counted CRC is compared with
transferred CRC. When transfer is finished, the result is reflected to
STATUS. However, data is stored FIFO, data number that packet A is
received is set to DATASIZE register of packet A.
5.
The transaction when SOF token from host is received is given below.
•
Change packet A's FIFO from X Condition to Y Condition.
•
Change packet B from Y Condition to X Condition, and clear data.
Prepare for next transfer.
•
Set frame number to frame register.
•
Assert SOF and inform externally that frame is incremented.
•
DATASET register set packet A bit and clear packet B bit
arrangement loading in present frame.
•
If CRC comparison result agrees, DATAIN is set to STATUS. If result
does not agree, RX_ERR is set to STATUS.
The UDC finishes normally by the above transaction.
The CPU takes back packet A's data.
92CH21-265
TMP92CH21
2009-06-19
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