Toshiba TLCS-900/H1 Series Manual page 162
Original cmos 32-bit microcontroller
Hide thumbs
Also See for TLCS-900/H1 Series:
Advertisement
Prescaler
φT0
2
4 8 16 32
φT2
φT8
Serial clock generation circuit
BR1CR<BR1CK1:0>
φT0
φT2
φT8
φT32
Baud rate generator
f
IO
SCLK1
I/O interface mode
SCLK1
Receive counter
(UART only ÷ 16)
RXDCLK
SC0MOD0
Receive
<RXE>
control
RXD1
Receive buffer 1 (Shift register)
RB8
Receive buffer 2 (SC1BUF)
64
φT32
BR1CR
BR1ADD
TA0TRG
<BR1S3:0>
<BR1K3:0>
(from TMRA0)
BR1CR
<BR1ADDE>
÷2
Serial channel
SC1MOD0
<WU>
interrupt control
<PE>
Parity control
Error flag
SC1CR
<OERR> <PERR> <FERR>
Internal data bus
Figure 3.9.3 Block Diagram of Serial Channel 1
92CH21-160
UART
mode
SC1MOD0
SC1MOD0
<SC1:0>
<SM1:0>
I/O interface mode
SC1CR
<IOC>
TXDCLK
SC1CR
<EVEN>
TB8
TMP92CH21
SIOCLK
INT request
Transmision
counter
(UART only ÷ 16)
Transmission
control
SC1MOD0
<CTSE>
Transmission buffer
(SC1BUF)
2009-06-19
INTRX1
INTTX1
CTS1
TXD1
Advertisement
