Toshiba TLCS-900/H1 Series Manual page 22
Original cmos 32-bit microcontroller
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3.3.2
SFR
Bit symbol
SYSCR0
(10E0H)
Read/Write
Reset state
Function
High-
frequency
oscillator
(fc)
0: Stop
1: Oscillation
Bit symbol
SYSCR1
(10E1H)
Read/Write
Reset state
Function
SYSCR2
Bit symbol
(10E2H)
Read/Write
Reset state
Function
Always
write "0"
Note 1: The unassigned registers, SYSCR0<bit5:3>, SYSCR0<bit1:0>, SYSCR1<bit7:4>, and
SYSCR2<bit6, bit1:0> are read as undefined value.
Note 2: Low-frequency oscillator is enabled on reset.
7
6
5
XEN
XTEN
R/W
1
1
Low-
frequency
oscillator
(fs)
0: Stop
1: Oscillation
7
6
5
7
6
5
−
WUPTM1
R/W
R/W
0
1
Warm-up timer
00: Reserved
8
01: 2
14
10: 2
16
11: 2
Figure 3.3.3 SFR for System Clock
4
3
4
3
SYSCK
R/W
0
Select
system clock
0: fc
1: fs
4
3
WUPTM0
HALTM1
R/W
R/W
0
1
HALT mode
00: Reserved
/input frequency
01: STOP mode
/input frequency
10: IDLE1 mode
/input frequency
11: IDLE2 mode
92CH21-20
TMP92CH21
2
1
WUEF
R/W
0
Warm-up
timer
0: Write
don't care
1: Write
start
timer
0: Read
end
warm-up
1: Read
do not end
warm-up
2
1
GEAR2
GEAR1
R/W
1
0
Select gear value of high-frequency (fc)
000: fc
001: fc/2
010: fc/4
011: fc/8
100: fc/16
101: (Reserved)
110: (Reserved)
111: (Reserved)
2
1
HALTM0
R/W
1
2009-06-19
0
0
GEAR0
0
0
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