Table of Contents
Advertisement
Serial Communication Interface (SCI)
SCI Programming Model
F
core
Divide
By 2
Divide
By 16
Timer
Interrupt
(STMINT)
core
BPS =
64 ´ ((7 ´ SCP + 1) ´ CD + 1)
where:
SCP = 0 or 1
CD = $000 to $FFF
8.3.3.5
SCCR Transmit Clock Source Bit (TCM) Bit 15
TCM selects whether an internal or external clock is used for the transmitter. If TCM is
cleared, the internal clock is used. If TCM is set, the external clock (from the SCLK
signal) is used. Either a hardware RESET signal or a software RESET instruction clears
TCM.
8.3.4
SCI Data Registers
The SCI data registers are divided into two groups: receive and transmit (as in
Figure 8-7). There are two receive registersÑa receive data register (SRX) and a
serial-to-parallel receive shift register. There are also two transmit registersÑa transmit
data register (called either STX or STXA) and a parallel-to-serial transmit shift register.
8-18
12-bit Counter
CD11ÐCD0
F
Figure 8-6 SCI Baud Rate Generator
DSP56309UM/D
Prescaler:
Divide by
1 or 8
SCP
SCI Core Logic
Uses Divide by 16 for
Asynchronous
Uses Divide by 2 for
Synchronous
COD
SCKP
Divide
By 2
Internal Clock
If Asynchronous
Divide by 1 or 16
If Synchronous
Divide By 2
SCKP = 0
+
SCKP = 1
Ð
TO SCLK
AA0693
MOTOROLA
Advertisement
Chapters
Table of Contents
