Table 1.2
Pin Functions (cont)
No. Pin Name
I/O
116
O
117
I*
118
/
I*
MD10
119 VDDQ
Power IO VDD
120 VSSQ
Power IO GND
121
/
I*
MD9
122 IDSEL
I
123
O
124
O
125 PCICLK
I
126
/
O
127
/
I
128
I/O
129 AD31
I/O
130 AD30
I/O
131 VDDQ
Power IO VDD
132 VSSQ
Power IO GND
133 AD29
I/O
Function
Reset
Bus grant
(host function)
Bus request
(host function)
Bus request
MD10
(host
function)/
mode
Bus request
MD9
(host
function)/
mode
Configuration
device select
Interrupt
(async)
Reset output
PCI input
clock
Bus grant (host
function)/
bus request
Bus request
(host function)
/bus grant
System error
PCI address/
data/port
PCI address/
data/port
PCI address/
data/port
Memory Interface
SRAM
DRAM
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
Rev. 3.0, 04/02, page 17 of 1064
SDRAM
PCMCIA MPX
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)