Hitachi SH7751 Hardware Manual page 367

Superh risc engine
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Bit:
Bit name:
MEMMODE
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:


Bit 15
A1MPX/A4MPX Enable (MEMMODE): Determines whether or not the selection of
either the MPX interface or the SRAM interface is by A1MPX and A4MPX rather than by
MEMMPX.
Bit 15: MEMMODE
0
1


Bits 14, 13
MPX-Interface Specification for Area 1 and 4 (A1MPX, A4MPX): These bits
specify the types of memory connected to areas 1 and 4. These settings are validated by
MEMMODE.
Bit 14: A1MPX
0
1
Bit 13: A4MPX
0
1


Bit 0
Burst Length (SDBL): Sets the burst length when the synchronous DRAM interface is
used. The burst-length setting is only valid when the bus width is 32 bits.
Bit 0: SDBL
0
1
Rev. 3.0, 04/02, page 328 of 1064
15
14
13
A1MPX A4MPX
0
0
R/W
R/W
R/W
7
6
0
0
R
R
Description
MPX or SRAM interface is selected by MEMMPX
MPX or SRAM interface is selected by A1MPX and A4MPX
Description
SRAM/byte control SRAM interface is selected for area 1
MPX interface is selected for area 1
Description
SRAM/byte control SRAM interface is selected for area 4
MPX interface is selected for area 4
Description
Burst length is 8
Burst length is 4
12
11
0
0
0
R
R
5
4
3
0
0
0
R
R
R
10
9
8
0
0
0
R
R
R
2
1
0
SDBL
0
0
0
R
R
R/W
(Initial value)
(Initial value)
(Initial value)
(Initial value)

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