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I/O System
An lOP Request
(lOP REQ) signal
(figure 6-1)
is generated when
either a low request
(IOLREQ)
signal or a high request (IOHREQ)
is about to set one of the select flip-flops
(IOLSEL or IOHSEL).
The
lOP REQ signal inhibits the setting of the
CPU Select flip-
flop.
However,
a CPU HREQ signal will inhibit IOLRQ from gener-
ating the lOP signal.
When data is returned from memory the FROM
comparator compares the data with the contents of the TO Register
to check that the transmission is from the same memory module
to
which the
address was sent.
The TO Comparator also checks that
the transmission is to this module.
Together, the outputs of the
two
comparators
generate an
I/O Strobe
(IOSTRB)
signal which
locks the lOP Data Out Register (see figure 7-10), because it now
contains the
correct information from the CTL Bus.
The
IOSTRB
also
tells the lOP that the data is ready for output via the lOP
Bus.
The MCU Ready comparator
checks to see
if a
destination
module is ready or that an I/O low request signal can set the I/O
Low Select
(IOLSEL)
flip-flop.
Setting the
IOLSEL
flip-flop
causes the contents
of the lOP Data In Register,
FROM,
TO, and
MOP signals to be read
out onto the CTL Bus for transmission
to
Main Memory.
7-21 Multiplexer Channel
The Multiplexer Channel (figure 7-9) acts as a switch
to
enable
one
of its associated Device Controllers to transfer one word of
data to or from memory via the lOP and then to allow another con-
troller, based on priority, to
perform
its
transfer.
At
all
times,
the
Multiplexer Channel contains the current I/O program
doubleword (paragraph 7-28) for each of the
possible
16
Device
Controllers.
To accomplish this, the Multiplexer Channel has a
l6-location, solid-state memory to contain
the
16
I/O
program
words,
and
is responsible for fetching the next I/O progam dou-
bleword when necessary.
A more
detailed
discussion
of
Multi-
plexer Channel operations is contained in paragraph 7-33.
7-22. Selector Channel
The Selector Channel (figure 7-9) acts as a switch, but in a man-
ner different from a Multiplexer Channel.
The Multiplexer
Chan-
nel
switches
between
Device
Controllers
on
demand, based on
hardware prior ity, wheras the Selector Channel maintains the con-
nection for one Device Controller until it has completed the
I/O
program.
Therefore, only one I/O program is current at a given
time for one channel.
Another
major
difference,
as
shown
in
figure 7-9, is that the Selector Channel accesses memory directly
for data and I/O program word transfers, rather
than
indirectly
through
the
lOP.
These features permit a very high speed data
transfer rate.
A more detailed lOP discussion of Selector
Chan-
nel operations is contained in paragraph 7-47.
7-23. I/O SYSTEM FUNCTIONAL OPERATION
The following paragraphs contain discussions of I/O priorities, a
summary of data routes, a comparison of basic transfer modes, and
detailed discussions of the I/O hardware operations.
7-19
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