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MCU/Main Memory Overview
two-bi t opcode)
are given in another
word in the stack.
(Refer
to Section IV for the CMD instruction definition.)
WARNING
The normal
checks
and
limitations
that
apply to the standard users in
MPE are bypassed in privileged mode.
It is possible for a privileged mode
program to destroy
file
integrity,
includ ing
the
MP E ope ra ting s ys tern
software
itself.
Hewlett-Packard
cannot
be
responsible
for
system
integrity when programs
written
by
users
operate
in
the
privileged
mode.
The ROM MCU
field codes of Control (CRL) and
Command (CMD),
in
that order,
are used to effect the execution of the CPU instruc-
tion CMD.
When the hardware decodes a CRL in the MCU
field,
it
gates bits 13 through 15 from the U-Bus, through the TO MUX lines
in the M:U,
and these
bits
are
clocked
into the
TO Registe r
(figure 6-1).
U-Bus bits
10 and 11
are
clocked
into the
MOP
Register.
A following line of microcode then executes a CMD MCU
function which gates that line's U-Bus data into ACORand
issues
a Low Reques t
(LREQ).
The MCU logic
performs the normal sequence of
checking for
bus
priority.
Then the contents of the TO Register are gated to the
TO lines of the CTL Bus, the contents of the FROM jumpers in
the
MOD Register
are gated to the FROM lines on the CTL Bus, and the
contents of the
MOP Register are gated to the MOP
lines 'of
the
CTL Bus.
The contents of ACOR
(figure 2-20)
are placed on the
MCUO lines of the CTL Bus.
What affect the MOP
and MCUO
lines
have on the addressed module depends on the design of the module.
When a module needs to communicate with the CPU, it cannot pass a
data word to the MCUO lines because the M:U is not expecting
the
communication
and will
not
gate the
MCUD lines back.
The CTL
Bus, however, since it does not use a handshake signal
sequence,
is
mon i tor ing the bus a t a l l times and the CPU is able to detect
that the module is trying to communicate.
The hardware generates
a module interrupt and sets CPXl (bit 7).
When the module
has priority to use the CTL Bus,
it places
the
CPU module number on the TO lines, CPU address on the FROM lines,
and a value on the MOP lines.
The MCU logic recognizes its
own
address, but because it is not expecting a value from the calling
module,
the FROM lines value is sent to bit positions 5, 6, and 7
of the MOD Register and the MOP value is sent to bit positions
2
and 3.
(See
figure 6-1.)
The microcode will fetch these values
6-7
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