CHAPTER 4 IMAGE PROCESSING SYSTEM
II.
CCD/CCD DRIVE
A. Controlling the CCD
Table 4-201 shows the major specifications of the CCD.
Item
Number of CCD lines
Number of CCD pixels
Output system
B. CCD Driver Circuit
The CCD driver reduces the impedance of image signals from CCD in its buffer (impedance
reduction circuit), and sends the result to the analog processor PCB.
CCD driver PCB
CCD
G
B
R
4-2
COPYRIGHT © 2002 CANON INC.
3 lines (GBR)
5000 pixels/line
2 channels (odd-/even-number)
Table 4-201
OSAG
OSBG
Buffer
OSAB
(impedance
OSBB
reduction circuit)
OSAG
OSBG
Clock pulses, shift pulses
Figure 4-201
CANON CLC1100/1130/1150/1160/1180 REV.0 MAR. 1999 PRINTED IN JAPAN (IMPRIME AU JAPON)
Specifications
G-ODD
G-EVEN
B-ODD
B-EVEN
R-ODD
R-EVEN
Analog processor
PCB
Reference
pulse generation
circuit