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(4) Various signals
Figures 16-22 to 16-27 show various signals in the SBI and flag operations of the serial bus interface control
register (SBIC). Table 16-5 lists various signals in SBI.
SIO0
SCK0
SB0 (SB1)
RELT
CMDT
RELD
CMDD
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SIO0
SCK0
SB0 (SB1)
RELD
CMDD
CHAPTER 16 SERIAL INTERFACE CHANNEL 0 ( µ PD78014Y Subseries)
Figure 16-22. RELT, CMDT, RELD and CMDD Operations (Master)
Figure 16-23. RELD and CMDD Operations (Slave)
Write FFH to SIO0
(Transfer start instruction)
A7
A6
A1
A0
1
2
7
8
A7
A6
A1
A0
Slave Address
Slave address write to SIO0
(Transfer Start Instruction)
Transfer start instruction
9
READY
ACK
When addresses match
When addresses do not match
357
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