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3.4.2
Micro DMA Processing
In addition to general-purpose interrupt processing, the TMP91C824 supprots a micro
DMA function. Interrupt requests set by micro DMA perform micro DMA processing at
the highest priority level (Level 6) among maskable interrupts, regardless of the priority
level of the particular interrupt source. Micro. The micro DMA has 4 channels and is
possible continuous transmission by specifing the say later burst mode.
Because the micro DMA function has been implemented with the cooperative operation
of CPU, when CPU goes to a standby mode by HALT instruction, the requirement of
micro DMA will be ignored (Pending).
(1) Micro DMA operation
When an interrupt request specified by the micro DMA start vector register is
generated, the micro DMA triggers a micro DMA request to the CPU at interrupt
priority level 6 and starts processing the request in spite of any interrupt source's
level. The micro DMA is ignored on <IFF2:0> = 7.
The 4 micro DMA channels allow micro DMA processing to be set for up to 4 types
of interrupts at any one time. When micro DMA is accepted, the interrupt request
flip-flop assigned to that channel is cleared.
The data are automatically transferred once (1/2/4 bytes) from the transfer source
address to the transfer destination address set in the control register, and the
transfer counter is decreased by 1 (−1).
If the decreased result is 0, the micro DMA transfer end interrupt (INTTC0 to
INTTC3) passes from the CPU to the interrupt controller. In addition, the micro DMA
start vector register DMAnV is cleared to 0, the next micro DMA is disabled and
micro DMA processing completes. If the decreased result is other than 0, the micro
DMA processing completes if it isn't specified the say later burst mode. In this case,
the micro DMA transfer end interrupt (INTTC0 to INTTC3) aren't generated.
If an interrupt request is triggered for the interrupt source in use during the
interval between the clearing of the micro DMA start vector and the next setting,
general-purpose interrupt processing executes at the interrupt level set. Therefore, if
only using the interrupt for starting the micro DMA (Not using the interrupts as a
general-purpose interrupt: Level 1 to 6), first set the interrupt level to 0 (Interrupt
requests disabled).
If using micro DMA and general-purpose interrupts together, first set the level of
the interrupt used to start micro DMA processing lower than all the other interrupt
levels. In this case, the cause of general interrupt is limited to the edge interrupt.
(Note)
The priority of the micro DMA transfer end interrupt (INTTC0 to INTTC3) is
defined by the interrupt level and the default priority as the same as the other
maskable interrupt.
Note: If the priority level of micro DMA is set higher than that of other interrupts, CPU operates as follows.
In case INTxxx interrupt is generated first and then INTyyy interrupt is generated between checking
"Interrupt specified by micro DMA start vector" (in the Figure 3.4.1) and reading interrupt vector with
setting below. The vector shifts to that of INTyyy at the time.
This is because the priority level of INTyyy is higher than that of INTxxx.
In the interrupt routine, CPU reads the vector of INTyyy because cheking of micro DMA has finished.
And INTyyy is generated regardless of transfer counter of micro DMA.
INTxxx: level 1 without micro DMA
INTyyy: level 6 with micro DMA
91C824-41
TMP91C824
2008-02-20
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