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(4) Runaway provision with SFR protection register
(Purpose)
Provision in runaway of program by noise mixing.
Write operation to specified SFR is prohibited so that provision program in
runaway prevents that it is it in the state which is fetch impossibility by stopping of
clock, memory control register (CS/WAIT controller, MMU) is changed.
And error handling in runaway becomes easy by INTP0 interruption.
Specified SFR list
1. CS/WAIT controller
B0CS, B1CS, B2CS, B3CS, BEXCS,
MSAR0, MSAR1, MSAR2, MSAR3,
MAMR0, MAMR1, MAMR2, MAMR3
2. MMU
LOCAL0/1/2/3
3. Clock gear (only EMCCR1, EMCCR2 can be written to)
SYSCR0, SYSCR1, SYSCR2, EMCCR0, EMCCR3
4. DFM
DFMCR0, DFMCR1
(Operation explanation)
Execute and release of protection (write operation to specified SFR) become possible
by setting up a double key to EMCCR1 and EMCCR2 register.
(Double key)
1st-KEY: Succession writes in 5AH at EMCCR1 and A5H at EMCCR2
2nd-KEY: Succession writes in A5H at EMCCR1 and 5AH at EMCCR2
A state of protection can be confirmed by reading EMCCR0<PROTECT>.
By reset, protection becomes OFF.
And INTP0 interruption occurs when write operation to specified SFR was executed
with protection ON state.
91C824-27
TMP91C824
2008-02-20
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