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(4) Chip select/wait control (2/2)
Symbol
Name
Address
Memory
start
MSAR2
CCH
address
register 2
Memory
address
MAMR2
CDH
mask
register 2
Memory
start
MSAR3
CEH
address
register 3
Memory
address
MAMR3
CFH
mask
register 3
7
6
5
S23
S22
S21
1
1
1
Start address A23 to A16
V22
V21
V20
1
1
1
CS2 area size
S23
S22
S21
1
1
1
Start address A23 to A16
V22
V21
V20
1
1
1
CS3 area size
91C824-243
4
3
2
S20
S19
S18
R/W
1
1
1
V19
V18
V17
R/W
1
1
1
0: Enable to address comparison
S20
S19
S18
R/W
1
1
1
V19
V18
V17
R/W
1
1
1
0: Enable to address comparison
TMP91C824
1
0
S17
S16
1
1
V16
V15
1
1
S17
S16
1
1
V16
V15
1
1
2008-02-20
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