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TLCS-900/L1 Series
Manual
Interrupt Control - Toshiba TLCS-900/L1 Series Manual
Original cmos 16-bit microcontroller
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Manual
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(3) Interrupt control (2/3)
Symbol
Name
Address
INTTX0
and
INTES0
98H
INTTRX0
enable
INTTX1
and
INTES1
99H
INTTRX1
enable
INTESBI
INTES2
9AH
enable
INTTC0
and
INTETC01
9BH
INTTC1
enable
INTTC2
and
INTETC23
9CH
INTTC3
enable
INTP0
and
INTEP01
9DH
INTP1
enable
7
6
5
INTTX0
ITX0C
ITX0M2
ITX0M1
R
R/W
0
0
0
1: INTTX0
Interrupt level
INTTX1
ITX1C
ITX1M2
ITX1M1
R
R/W
0
0
0
1: INTTX1
Interrupt level
–
–
–
–
–
–
–
–
–
Always write "0"
INTTC1
ITC1C
ITC1M2
ITC1M1
R
R/W
0
0
0
INTTC3
ITC3C
ITC3M2
ITC3M1
R
R/W
0
0
0
INTP1
IP1C
IP1M2
IP1M1
R
R/W
0
0
0
91C824-240
4
3
2
INTRX0
ITX0M0
IRX0C
IRX0M2
R
0
0
0
1: INTRX0
INTRX1
ITX1M0
IRX1C
IRX1M2
R
0
0
0
1: INTRX1
INTSBI
–
ISBIC
ISBIM2
R
–
0
0
1: INTSBI
INTTC0
ITC1M0
ITC0C
ITC0M2
R
0
0
0
INTTC2
ITC3M0
ITC2C
ITC2M2
R
0
0
0
INTP0
IP1M0
IP0C
IP0M2
R
0
0
0
TMP91C824
1
0
IRX0M1
IRX0M0
R/W
0
0
Interrupt level
IRX1M1
IRX1M0
R/W
0
0
Interrupt level
ISBIM1
ISBIM0
R/W
0
0
Interrupt level
ITC0M1
ITC0M0
R/W
0
0
ITC2M1
ITC2M0
R/W
0
0
IP0M1
IP0M0
R/W
0
0
2008-02-20
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