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DRX-2
5.3 Playback Mode
During playback, the serial data from the DVDR
mechanism is going directly to the PNX7100 via the serial
front-end I2S interface.
The PNX7100 is an MPEG CoDec and has the following
outputs:
• To the analogue board: analogue video RGB, YC,
CVBS on connector 1904.
• I2S audio (PCM format) on connector 1900.
• SPDIF audio (digital audio output) on connector 1904.
• Progressive video on connector 1704.
• Communication gateway (RS232) on connector 1104.
5.5 Clock Distribution
Clock distribution on Chrysalis board
24.576 MHz
7004
VIP7118
7703
ADV7196
7201
1394 LINK
7200
1394 PHY
24.576 MHz
The PNX7100 has a complex clock system, which is
needed to support the processes running at different
frequencies such as video decoding, audio decoding or
peripheral I/O devices etc.
To ensure a synchronous initialization of all the registers
and state machines, all the PLLs are switched to their
default frequency and the reset sequence is run at 4 MHz.
Then when the booting control unit is correctly initialized
and once it has captured all the booting parameters, it sets
112
7400
7300
AUDIO PLL
5.4 DVDR Mechanism Interfaces
AV2 DVDR Mechanism (VAE8015 and VAE8020)
The UART interface (for the S2B commands) between the
Chrysalis and the servo processor (MACE3 on the BE
module), controls the AV2 DVDR mechanism during
record and playback mode. For data transport, an I2S bus
is used.
For detailed information on the AV2 BE module, see
Service Manual 3122 785 12470.
AV3 DVDR Mechanism (VAE8030)
To be prepared for new developments, the Chrysalis
Digital Board is equipped with two IDE busses (ATAPI).
They can be used for connecting to the new generation
DVDR mechanism (e.g. the AV3), a Hard Disc Drive
(HDD), or a Smart Card Reader.
BE INTERFACE
CHRYSALIS
PNX7100
27 MHz
4 MHz
Osc.
OPTIONAL
the PLLs to its functional frequency to allow the modules
to run at their nominal frequencies. Thanks to a clock
blocking mechanism, the frequency switching is glitch
free.
System clocks:
• PNX7100 (IC7400, pins AF9 and AF10) : 4 MHz
provided by the xtal oscillator 7402.
7804
133MHz
SDRAM
7812
SDRAM
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