Flash Memory Status Register (Flmsr) - Hitachi F-ZTAT H8/3039 Series Hardware Manual

Single-chip microcomputer
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15.3.4

Flash Memory Status Register (FLMSR)

The flash memory status register (FLMSR) detects flash memory errors.
Bit
FLER
Initial value
R/W
Bit 7—Flash Memory Error (FLER): Indicates that an error occurred while flash memory was
being programmed or erased. When bit 7 is set, flash memory is placed in an error-protect mode.
Bit 7
FLER
Description
0
Flash memory program/erase protection (error protection *
[Clearing conditions]
WDT reset, reset by RES pin, or hardware standby mode
1
An error has occurred during flash memory programming/erasing
Flash memory program/erase protection (error protection *
[Setting conditions]
1. Flash memory was read*
instruction fetch, but not including reading of a RAM area overlapped onto flash
memory).
2. A hardware exception-handling sequence (other than a reset, invalid instruction,
trap instruction, or zero-divide exception) was executed just before programming or
erasing. *
3. The SLEEP instruction (including software standby mode) was executed during
programming or erasing.
Notes: 1. For details, see section 15.6.3, Error Protection.
2. The read data has undetermined values.
3. Before stack and vector read by exception handling.
Bits 6 to 0—Reserved: These bits cannot be modified and are always read as 1.
448
7
6
5
0
1
1
R
Flash memory error
Status flag indicating that
an error was detected during
programming or erasing
2
while being programmed or erased (including vector or
3
4
3
1
1
Reserved bits
2
1
0
1
1
1
1
) is disabled (Initial value)
1
) is enabled

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