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Philips Semiconductors
ARM-based Microcontroller
ARCHITECTURE
The block diagram for TIMER0 and TIMER1 is shown in Figure 41.
* Note that Capture Register 3 cannot be used on TIMER0
Timer0 and Timer1
Match Register 0
Match Register 1
Match Register 2
Match Register 3
Match Control Register
External Match Register
Interrupt Register
Control
MAT[3:0]
Interrupt
CAP[3:0]
Stop on Match
Reset on Match
Load[3:0]
Capture Control Register
Capture Register 0
Capture Register 1
Capture Register 2
Capture Register 3*
RESET
ENABLE
Timer Control Register
Figure 41: Timer block diagram
LPC2119/2129/2194/2292/2294
=
=
=
=
CSN
Timer Counter
CE
TCI
Prescale Counter
MAXVAL
Prescale Register
222
Preliminary User Manual
pclk
May 03, 2004
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