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Philips Semiconductors
ARM-based Microcontroller
2
12. I
C INTERFACE
FEATURES
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• Standard I
C compliant bus interface.
• Easy to configure as Master, Slave, or Master/Slave.
• Programmable clocks allow versatile rate control.
• Bidirectional data transfer between masters and slaves.
• Multi-master bus (no central master).
• Arbitration between simultaneously transmitting masters without corruption of serial data on the bus.
• Serial clock synchronization allows devices with different bit rates to communicate via one serial bus.
• Serial clock synchronization can be used as a handshake mechanism to suspend and resume serial transfer.
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• The I
C bus may be used for test and diagnostic purposes.
APPLICATIONS
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• Interfaces to external I
C standard parts, such as serial RAMs, LCDs, tone generators, etc.
DESCRIPTION
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A typical I
C bus configuration is shown in Figure 24. Depending on the state of the direction bit (R/W), two types of data transfers
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are possible on the I
C bus:
• Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the master is the slave address. Next
follows a number of data bytes. The slave returns an acknowledge bit after each received byte.
• Data transfer from a slave transmitter to a master receiver. The first byte (the slave address) is transmitted by the master. The
slave then returns an acknowledge bit. Next follows the data bytes transmitted by the slave to the master. The master returns
an acknowledge bit after all received bytes other than the last byte. At the end of the last received byte, a "not acknowledge"
is returned. The master device generates all of the serial clock pulses and the START and STOP conditions. A transfer is ended
with a STOP condition or with a repeated START condition. Since a repeated START condition is also the beginning of the
next serial transfer, the I
This device provides a byte oriented I
slave transmitter mode and slave receiver mode.
I2C Interface
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C bus will not be released.
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C interface. It has four operating modes: master transmitter mode, master receiver mode,
LPC2119/2129/2194/2292/2294
166
Preliminary User Manual
May 03, 2004
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