Toshiba H1 Series Data Book page 329

32bit micro controller tlcs-900/h1 series
Table of Contents

Advertisement

2.
Parity error <PERR>
The parity generated for the data shifted into receiving buffer 2 (SC0BUF) is
compared with the parity bit received via the RXD pin. If they are not equal, a
parity error is generated.
Note: The parity error flag is cleared every time it is read. However, if a parity error is detected w¥twice in
succession and the parity error flag is read between the two parity errors, it may seem as if the flag had not
been cleared. To avoid this situation, a read of the parity error flag should be riggered by a receive interrupt.
3.
Framing error <FERR>
The stop bit for the received data is sampled three times around the center. If
the majority of the samples are 0, a Framing error is generated.
92CZ26A-326
TMP92CZ26A

Advertisement

Table of Contents
loading

This manual is also suitable for:

Tlcs-900Tmp92cz26axbg

Table of Contents