HP 37718A Installation And Verification Manual page 27
Communications performance analyzer
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Also See for 37718A:
- User manual (190 pages) ,
- Installation and verification manual (202 pages)
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General Information
Specifications
Framing:
All rates: Unframed, framed and
structured.
DS1: D4, SLC-96, ESF. ESF to ANSI
T1.403-1989, Bellcore TR-TSY-
000499 and ITU-T G.704; the ESF data
link (DL) defaults to repetition of idle
code (01111110);
DS3: M13 to ANSI T1.107-1995. C-bit
parity to ANSI T1.107a-1990.
E1: To ITU-T G.706/G.732
E3: To ITU-T G.751
N x 64 kb/s structured to ITU-T G.704
for E1, E3
N x 64 kb/s and N x 56 kb/s structured
for DS1 and DS3.
Test pattern:
9
11
15
PRBS: 2
-1, 2
-1, 2
-1, 2
QRSS (DS1only), 3-in-24 stress pattern
(DS1 only).
Word: 1010, 1000, 16 bit user word, all
ones, all zeros.
Live traffic: Receiver only.
Background patterns: 2
or same as test pattern as foreground
test signal.
Error add type:
DS1: Bit, FAS (Frame Alignment
Signal), BPV/code, CRC-6, EXZ
(excess zeros).
DS3: Bit, FAS, MFAS (MultiFrame
Alignment Signal), BPV/code, parity
(P bits), CP (path parity), FEBE, EXZ
(excess zeros).
E1: Bit, FAS, Code, CRC-4, REBE.
E3: Bit, FAS, Code.
Error add rate: Single. 1.0E-3. 1.1E-3.
1.0E-4 to 9.9E-9. Mantissa step size
0.1, exponent step size 1.
Alarm generation:
DS1: LOS; Out of frame (OOF); AIS;
RAI.
DS3: LOS; LOF; AIS; RAI; far end
alarm and control (FEAC): As per
T1.107-1995.
E1: LOS, LOF, AIS, RAI.
E3: LOS, LOF, AIS, RAI.
FEAC code generation: With C-Bit
parity framing loopback and alarm/
status codes as per ANSI T1.107-1995
can be generated.
Loopback codes: A single burst of N
loopback codes and M messages. N and
M are in the range 1 through 15.
Alarm/status codes: Any ANSI T1.107-
1995 message or a 0xxxxxx011111111
20
23
-1, 2
-1,
message where x is selectable may be
transmitted either in a single burst of 1
to 15 times or continuously.
Spare bits generation:
34 Mb/s: FAS bit 12
2 Mb/s
9
-1 PRBS, AIS
Si bits (international bits): Timeslot 0 bit
1inbothFASandNFASframes.
E bits: CRC4 frames 13 and 15;
timeslot 0 bit 1.
Sa bit (national bits): NFAS timeslot bits
4 to 8.
Sa bit sequences: An 8 bit sequence
may be transmitted in any selected
NFAS Sa bit when CRC4 framing has
been selected. The sequence appears in
odd-numbered CRC4 frames, starting
at frame 1.
CAS multiframe: MFAS timeslot bits 5,
7 and 8.
Frequency offset: Up to 100 ppm in 1
ppm steps.
1-17
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