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Instruction
CMPM
CMP2
DIVS/DIVU
DIVSL/DIVUL
EXT
EXTB
MULS/MULU
NEG
NEGX
SUB
SUBA
SUBI
SUBQ
SUBX
TBLS/TBLU
TBLSN/TBLUN
4.3.4 Logic Instructions
The logical operation instructions (AND, OR, EOR, and NOT) perform logical opera-
tions with all sizes of integer data operands. A similar set of immediate instructions
(ANDI, ORI, and EORI) provide these logical operations with all sizes of immediate da-
ta. The TST instruction arithmetically compares the operand with zero, placing the re-
sult in the condition code register. Table 4-4 summarizes the logical operations.
Instruction
AND
ANDI
EOR
EORI
NOT
OR
ORI
MOTOROLA
4-8
Table 4-3 Integer Arithmetic Operations
Syntax
Operand Size
(An) +, (An) +
8, 16, 32
〈ea〉, Rn
8, 16, 32
〈ea〉, Dn
32/16 → 16 : 16 Destination / Source → Destination
〈ea〉, Dr : Dq
64/32 → 32 : 32
〈ea〉, Dq
32/32 → 32
〈ea〉, Dr : Dq
32/32 → 32 : 32
8 → 16
Dn Dn
16 → 32
8 → 32
Dn
〈ea〉, Dn 〈ea〉, Dl
16 ∗ 16 → 32
〈ea〉, Dh : Dl
32 ∗ 32 → 32
32 ∗ 32 → 64
〈ea〉
8, 16, 32
〈ea〉
8, 16, 32
〈ea〉, Dn Dn, 〈ea〉
8, 16, 32
〈ea〉, An
16, 32
#〈data〉, 〈ea〉
8, 16, 32
#〈data〉, 〈ea〉
8, 16, 32
Dn, Dn
8, 16, 32
– (An), – (An)
8, 16, 32
〈ea〉, Dn
8, 16, 32
Dym : Dyn, Dn
〈ea〉, Dn
8, 16, 32
Dym : Dyn, Dn
Table 4-4 Logic Operations
Syntax
Operand Size
〈ea〉, Dn
8, 16, 32
Dn, 〈ea〉
8, 16, 32
#〈data〉, 〈ea〉
8, 16, 32
Dn, 〈ea〉
8, 16, 32
#〈data〉, 〈ea〉
8, 16, 32
〈ea〉
8, 16, 32
〈ea〉, Dn
8, 16, 32
Dn, 〈ea〉
8, 16, 32
#〈data〉, 〈ea〉
8, 16, 32
INSTRUCTION SET
Operation
(Destination – Source), CCR shows results
Lower bound Rn Upper bound, CCR shows result
(signed or unsigned)
Destination / Source → Destination
(signed or unsigned)
Sign extended Destination → Destination
Sign extended Destination → Destination
Source ∗ Destination → Destination
(signed or unsigned)
0 – Destination → Destination
0 – Destination – X → Destination
Destination – Source → Destination
Destination – Source → Destination
Destination – Data → Destination
Destination – Data → Destination
Destination – Source – X → Destination
Dyn – Dym → Temp
(Temp ∗ Dn [7 : 0]) → Temp
(Dym ∗ 256) + Temp → Dn
Dyn – Dym → Temp
(Temp ∗ Dn [7 : 0]) / 256 → Temp
Dym + Temp → Dn
Operation
Source • Destination → Destination
Data • Destination → Destination
Source ⊕ Destination → Destination
Data ⊕ Destination → Destination
Destination → Destination
Destination → Destination
+
Source
Destination → Destination
+
Data
CPU32
REFERENCE MANUAL
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